Radarcape:About the Radarcape
The idea behind the Radarcape is that there are many ideas of Mode-S and passive radar applications that require a high performance backend. For a while I thought that a so called “embedded core 1) on the FPGA itself would be the solution, but finally I found that there is a low cost Linux board, supporting add on components, the Beaglebone. This is a 700MHz ARM CortexTM-A8 based board, supporting Linux, Android and other operating systems. It has USB host and slave connectivity, a 10/100MBit LAN, an internal Micro-SD card, 100kSample ADC, I²C, SPI and plenty of other interfaces. It is supported by official Linux Kernel, and there are ready-to-go Linux distributions available which can simply become installed on the system. Writing software for the Beaglebone is as easy as writing software for a DOS box in Windows. Two other outstanding facts are the price, which is in the range of a single Xport, and the small size, see the Beagebone link above.
The Radarcape is based on the prooven technics of the Mode-S Beast, so all experience and performance can 1:1 be transfered to it. It still has one receiver on boards plus a connector for external signals.
The FPGA is from the next generation compared to the Mode-S Beast, and offers enough resources for other modulation schemes and even internal preprocessing (*1)
Most probable the sample rate will be 32MSample per second, twice as high as of the Mode-S Beast. There is an experimental platform foreseen for 64MSamples. Due to this the timestamp accuracy will be increased, and also weak frames can be resolved much better. There is a connectivity for a Trimble GPS module for timestamp and location services. GPS information will be available to the Linux system, too.
The FPGA firmware will become downloaded from the Linux System and no longer be stored in a local flash. This makes firmware handling much easier and also allows bundling of applications with the FPGA firmware like in many professional systems.
The Radarcape interfaces to an internal 3.3V TTL UART of the Beaglebone and no longer has USB on board, however there is a USB connectivity in the traditional way through the Beaglebone. Actually the Beaglebone already in its basic delivery configuration already provides a FTDI serial interface towards USB. The Beaglebone's SPI and I²C interfaces can be used in order to initalize exernal hardware, for example in order to set external receivers to a dedicated frequency.
The mechanical design is will allow an integration into a small box with all externals accessible. The total power consumption is expected to be around 5W.